The present invention relates to computers and, more particularly, to error-handling in computers. In this specification, related art labeled “prior art” is admitted prior art; related art not labeled “prior art” is not admitted prior art.
Applications for which errors are unacceptable can be run on computers that detect and address errors that inevitably occur. For example, parity bits or error-correction code bits can be added to data being communicated so that errors can be detected and, in some cases, corrected. If the errors cannot be corrected, often the data can be regenerated or retransmitted. However, it is generally impractical to employ error detection and error correction extensively within a processor. Accordingly, data corruptions occuring with in a processor are often undetected, i.e., “silent”.
Such silent data corruption can be addressed by running two or more processors in lock-step. In other words, the same program is run on two processors. The processor outputs can then be compared with differences being used to indicate errors, with various approaches being available for addressing the detected errors.